Sr. Member, Technical Staff Job at Synopsys
35343BR
USA - California - California, USA - Oregon - Hillsboro, USA - Texas - Austin
Job Description and Requirements
Director, Foundry Design Technology Co-Optimization
Synopsys Inc Mountain View, CA
Job Description & Requirements
Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.
The Foundry Design Technology Co-Optimization (FDTCO) team has end to end ownership of the HDG’s (Hardware Development Group) products process technology. From pre-silicon to volume production, the goal is to enable optimization of HDG’s hardware to the target foundry and to provide Synopsys’ SLM business with the most predictable, flexible, and reliable foundry technology. We are seeking an experienced, highly motivated, and high-caliber individual to lead the FDTCO team. This individual should have extensive experience liaising with foundries and working with the foundry & design engineering community to co-optimize analog and digital designs mapped to these foundries. The candidate will also find and recruit a talented team to execute against the FDTCO team’s vision, mission, and goals. Additional responsibilities include:
Job Requirements
Preferred Skills:
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Synopsys Inc Mountain View, CA
Job Description & Requirements
Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.
The Foundry Design Technology Co-Optimization (FDTCO) team has end to end ownership of the HDG’s (Hardware Development Group) products process technology. From pre-silicon to volume production, the goal is to enable optimization of HDG’s hardware to the target foundry and to provide Synopsys’ SLM business with the most predictable, flexible, and reliable foundry technology. We are seeking an experienced, highly motivated, and high-caliber individual to lead the FDTCO team. This individual should have extensive experience liaising with foundries and working with the foundry & design engineering community to co-optimize analog and digital designs mapped to these foundries. The candidate will also find and recruit a talented team to execute against the FDTCO team’s vision, mission, and goals. Additional responsibilities include:
- Be the liaison between the foundry and HDG to deliver physical design to the foundry
- Collaborate with HDG design and CAD to ensure stable design environment
- Enable design kits to ensure design restrictions, performance/power/area, yield, and reliability
- Review physical verification results for technology compliance prior to IP or customer SOC level production releases
- Set expectations for foundry capability and drive the foundry to meet the product requirements
- Optimize process targeting and monitor process targeting for yield/performance/power and yield
- Provide accurate pre-silicon yield forecast
- Feedback reliability observations to the foundry and drive process improvements as needed
- Accountability for managing the foundry technology through different phases of the product and technology lifecycle
- Act as liaison between HDG’s products, customers, and foundry partners to ensure high quality product tape out
Job Requirements
- BS or MS degree in Electrical Engineering
- Experience building and managing global teams
- 15+ years of experience in liaising with foundries and design-technology co-optimization
- Demonstrated technical expertise in the productization of advanced technologies
- Strong technical program management skills
- Fundamental understanding of semiconductor device physics, reliability including ESD/Latch-Up/EM, aging (HCI/NBTI), silicon process technology and circuit design
- Understanding of the design, manufacturing, and test process, and the overall supply chain from foundries to customers
- Demonstrated experience with multiple CAD flows: design, verification, backend, validation, etc.
- Experience with yield analysis to drive yield and quality/DPPM (Defective Part Per Million) improvements
- Excellent teamwork, communication, mentoring, and interpersonal skills with both internal teams and external customers
Preferred Skills:
- Creating and supporting Process Design Kits (PDK)
- Expertise in areas of optimizing PPA (Performance, Power, Area) achieved pre-silicon and realized post-silicon, and improving execution schedules
- Significant knowledge of semiconductor hardware, test, and analytics business and operations
- Deep understanding of modern digital, analog, mixed signal IC design flows and commonly used IPs
- Proficiency with software development using Python/Perl/TCL/SKILL/Shell
- Knowledge of web technologies and big data
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
United States
Job Subcategory
R&D Engineering
Hire Type
Employee
Base Salary Range
$180,000 - $315,000
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